Unit name | Digital Systems |
---|---|
Unit code | EENG20400 |
Credit points | 10 |
Level of study | I/5 |
Teaching block(s) |
Teaching Block 1 (weeks 1 - 12) |
Unit director | Dr. Nunez-Yanez |
Open unit status | Not open |
Pre-requisites | |
Co-requisites | |
School/department | School of Electrical, Electronic and Mechanical Engineering |
Faculty | Faculty of Engineering |
This unit develops topics in digital system design at an intermediate level. A further study of combinational and sequential logic focuses on issues and design methods which are relevant to modern styles of implementation, and provides a framework for later studies in VLSI design.
Views of a design: Behaviour, structure, layout.
Survey of modern technologies: VLSI, ASIC, programmable logic.
Top-down design: Classification, decomposition.
Minimisation: Definitions, minimisation of single output functions using prime implicant tables, multiple output prime implicants, variable entered Karnough maps.
MSI combinational logic blocks: Decoders, multiplexers, parity generators.
Circuit hazards: Static and dynamic hazards, logic hazards and their removal, function hazards.
Finite state machines: Moore and Mealy models, state transition graphs, ASM charts, state tables, state reduction, bubble charts, memory based state machines
Synchronous sequential circuits: state encoding, asynchronous inputs, metastability, counters and registers.
Arithmetic circuits: ripple carry adder/subtractor, carry-lookahead, carry-bypass and carry-select adders, serial and parallel multipliers, carry-save multiplication, Wallace tree, Booth algorithm.
Memory: Flash, SRAM, DRAM : read and write waveforms, SRAM/DRAM architecture, timing parameters
Programmable logic devices: FPGA architecture : look-up tables, logic cells, embedded logic blocks, CAD tools, application of FPGAs and their limitations.
Laboratory Work case study: Design using VHDL of a serial data receiver.
On successful completion of the unit a student will be able to:
Lectures and Laboratory classes
Computer-based quiz on Serial Data Receiver laboratory, 15% (ILOs 3, 5)
Exam, 2 hours, 85% (ILOs 1, 2, 4-8)