Advanced gate driving

The power electronics industry is poised to undergo significant change, as ultra-fast-transition transistors made from silicon carbide (SiC) and gallium nitride (GaN) have recently emerged. These could push efficiencies to levels never achieved before, but only if extremely short switching transitions (below 10 nanoseconds) can be achieved. Fast switching is challenging, however. For example, it produces high electromagnetic emissions. Over the past years, the Electrical Energy Management Group has developed a range of novel gate-driving techniques, to help industry adopt SiC and GaN, and increase the power throughput of power converters whilst reducing electromagnetic emissions.

What is active gate driving?

Gate drivers normally apply a constant voltage to a gate (e.g. 5 V) to turn on a power semiconductor device. Applying 0 V turns it off. Instead of this single step, an active gate driver shapes the gate voltage in order to improve switching waveforms. Active gate driving for silicon power electronics is generally carried out using analogue closed-loop techniques, where the drain-source voltage is made to follow a desired reference voltage.

For GaN, faster techniques are required. We use an 800 MHz clock to trigger much faster asynchronous pulse trains, which complete in a single clock cycle. In this way, the gate signal can be changed once every 100 ps, which equates to an update rate of 10 GHz.

During most of the switching process, the driver operates as a current source, as the output transistors are saturated. As the gate voltage approaches the driver's maximum output voltage, the driver resembles a voltage source with a programmable output resistance.

For more information on our Advance Gate Driving research please visit: 

PhD Opportunities

Interested in the electric revolution, future of transport or Power Electronics? We're looking for enthusiastic and motivated students to join the EEMG.

Current PhD opportunities

EEMG Brochure (PDF)

Research funding

This work has been funded by various grants, including:

EPSRC Quietening Waveforms

EPSRC Pulse Quietening

EPSRC Power Electronics Centre


  • 2017
  • 1st place poster prize at UK Centre for Power Electronics Annual Conference
  • 2016
  • Best Paper Award at IEEE ECCE
  • 2012
  • 1st Place IEEE IAS Society Prize Journal Paper Award


To trial our active gate driver ICs, please contact Bernard Stark

We are keen to work with companies to develop drivers for specific applications, and to help other research groups and companies set up test benches using our ICs.

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