
Dr Zhiqiang Que
PhD, MSc, BSc
Expertise
My work focuses on efficient ML/AI algorithms, hardware and systems, as well as design automation.
Current positions
Contact
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Biography
Before joining the University of Bristol, he was a Research Associate in the Department of Computing at Imperial College London, where he worked in the Custom Computing Research Group. His research there covered reconfigurable computing, quantization-aware training, compiler-based hardware generation, and low-latency machine learning for scientific applications, including real-time data processing for particle physics experiments at CERN.
Prior to his academic career, Zhiqiang gained significant industry experience in hardware design. He worked as a Senior Design Engineer at Marvell Technology, focusing on CPU microarchitecture and computer arithmetic, and later as an FPGA Specialist at China Financial Futures Exchange Technology, where he developed ultra-low-latency FPGA systems for financial applications.
Zhiqiang has collaborated with leading academic and industrial partners, including Imperial College London, CERN, Intel, Xilinx/AMD, UBC, and Science Tokyo. His research has received international recognition, including Best Paper Awards at FPT‘25 and FCCM’26. His broader research vision is to enable the next generation of AI/ML systems through algorithm–hardware co-design, making advanced machine learning more efficient, reliable, and accessible across science, engineering, healthcare, and edge computing applications.
PhD and internship applications are welcome.
Research interests
ZQ's research focuses on efficient and trustworthy AI/ML systems, with particular emphasis on AI accelerators, FPGA-based computing, hardware-aware machine learning, and design automation for domain-specific architectures. He is interested in building AI systems that are not only accurate, but also fast, energy-efficient, and suitable for deployment in real-world constrained environments.
Publications
Recent publications
18/06/2026A Clock-Independent, Time-Domain Rapid Calibration Method for Memristor-based Analog Computing AI Processors
2026 proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS)
Enhancing Trustworthiness with Mixed Precision
ASP-DAC 2026 - 31st Asia and South Pacific Design Automation Conference, Proceedings
FQTree
2026 IEEE 37th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
HGQ: High Granularity Quantization for Real-time Neural Networks on FPGAs
Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Array
HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
2026 IEEE 34th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)


