
Dr Daniel Page
Ph.D.(Bristol)
Current positions
Senior Lecturer in Computer Science
Department of Computer Science
Contact
Media contact
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Research interests
My current research focuses on challenges in cryptographic engineering, the implementation (in hardware and/or software) of and implementation attacks (relating to both side-channel and fault attacks) on cryptographic primitives and arithmetic in particular. I am also interested in the design of (general-purpose) processors, compilers, and programming languages. My previous work in these fields has included
- implementation using novel processors and/or hardware (e.g., implementation of RSA on GPU-based, multi-core, and SIMD-enabled platforms),
- novel side-channel attacks and countermeasures (e.g., non-deterministic processor designs, attacks using cache memory as a side-channel), and
- domain specific compiler/language support for cryptography (e.g., optimisation of AES, automatic side-channel countermeasures for ECC).
Projects and supervisions
Research projects
DiScriBe - Digital Security by Design Social Science Hub +
Principal Investigator
Role
Co-Investigator
Description
The Digital Security by Design (DSbD) Programme, supported through the ISCF, aims to radically update the digital infrastructure currently underpinning the global economy, making it secure against future threats. Discribe…Managing organisational unit
Department of Computer ScienceDates
01/09/2020 to 31/08/2024
8030 EPSRC via QUB SIPP EP/S030867/1 R1098EC1
Principal Investigator
Managing organisational unit
Department of Computer ScienceDates
01/12/2019 to 30/11/2023
SCARV: A side-channel hardened RISC-V platform
Principal Investigator
Managing organisational unit
Department of Computer ScienceDates
01/02/2018 to 31/01/2023
ACE-CSR-2
Principal Investigator
Managing organisational unit
Department of Computer ScienceDates
20/08/2017 to 19/08/2022
Side channel aware software design flow
Principal Investigator
Managing organisational unit
Department of Computer ScienceDates
01/01/2016 to 31/12/2020
Thesis supervisions
Publications
Recent publications
23/08/2021A lightweight ISE for ChaCha on RISC-V
XDIVINSA: eXtended DIVersifying INStruction Agent to Mitigate Power Side-Channel Leakage
An Instruction Set Extension to Support Software-Based Masking
IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)
MIRACLE: MIcRo-ArChitectural Leakage Evaluation
IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)
Implementing the Draft RISC-V Scalar Cryptography Extensions
HASP '20: Proceedings of the 9th International Workshop on Hardware and Architectural Support for Security and Privacy