Electrical and Reliability Characterization Techniques
Electronic devices like GaN microwave or power transistors are impacted not only by the doping of each device layer and the presence of heterojunctions, but also by deep trap states located on the surface of high electron mobility transistors (HEMTs), or within different device layers. These GaN devices usually consist of a thin layer of approximately 10s of nanometers of AlGaN, grown onto a thicker GaN layer with current flowing at the interface between these two layers. The charge state of the traps has a direct impact on how current flows in the devices under static (DC) and dynamic conditions. Dependent on electric field strength and orientation, in a power transistor that is made to switch between ON and OFF state, traps can capture or de-trap electrons, causing a change in electro-static potential in the devices. This naturally influences how devices operate. The resistance of a transistor in the linear regime can be different when the device is operated under DC or pulsed conditions (dynamic Ron issue), due to this dynamic charging of the trap states. The state of the traps can also change during the lifetime of a device. “Hot” electrons accelerated by the high internal electric field can modify pre-existing traps, or generate new traps. During device design these factors need careful consideration, taking into account the reliability of the device and identifying possible failure modes.
Figure 1. Backbiasing measurement technique for GaN power HEMTs
We develop and apply electrical techniques that monitor traps in materials and devices, as well as perform failure analysis of devices (including using transmission electron microscopy - TEM). A recent example of our work includes a back-biasing technique, where the substrate is ramped in voltage, whilst we monitor the current as it flows in the device channel. The substrate bias induces vertical displacement currents in the devices, and allows the tracking of not only leakage pathways, but also the number and nature of electronic traps in the various device layers. This is complemented by further techniques that monitor the state of traps in devices, such as dynamic transconductance measurements, or noise measurements. Electrical testing techniques combined with device simulation provide detailed physical understanding of how devices work, helps intelligent device design, and allows us to acquire a deeper understanding of device failure.
Figure 2. Noise measurement on degrading GaN HEMT
Figure 3. Electroluminescence from GaN HEMT indicating locations of device failure