Zhiqiang Que is a Lecturer in Edge Computing at the University of Bristol. His research focuses on efficient and trustworthy AI/ML systems, with particular emphasis on AI accelerators, FPGA-based computing, hardware-aware machine learning, and design automation for domain-specific architectures. He is interested in building AI systems that are not only accurate, but also fast, energy-efficient, and suitable for deployment in real-world constrained environments.

Before joining the University of Bristol, he was a Research Associate in the Department of Computing at Imperial College London, where he worked in the Custom Computing Research Group. His research there covered reconfigurable computing, quantization-aware training, compiler-based hardware generation, and low-latency machine learning for scientific applications, including real-time data processing for particle physics experiments at CERN. He received his PhD from Imperial College London, and both his MSc and BSc degrees from Shanghai Jiao Tong University.

Prior to his academic career, Zhiqiang gained significant industry experience in hardware design. He worked as a Senior Design Engineer at Marvell Technology, focusing on CPU microarchitecture and computer arithmetic, and later as an FPGA Specialist at China Financial Futures Exchange Technology, where he developed ultra-low-latency FPGA systems for financial applications.

Zhiqiang has collaborated with leading academic and industrial partners, including Imperial College London, CERN, Intel, Xilinx/AMD, UBC, and Tokyo Tech. His research has received international recognition, including Best Paper Awards at FPT‘25 and FCCM’26. His broader research vision is to enable the next generation of AI/ML systems through algorithm–hardware co-design, making advanced machine learning more efficient, reliable, and accessible across science, engineering, healthcare, and edge computing applications.