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Unit information: Digital Systems in 2021/22

Unit name Digital Systems
Unit code EENG20400
Credit points 10
Level of study I/5
Teaching block(s) Teaching Block 1 (weeks 1 - 12)
Unit director Dr. Kris Nikov
Open unit status Not open




School/department Department of Electrical & Electronic Engineering
Faculty Faculty of Engineering

Description including Unit Aims

This unit develops topics in digital system design at an intermediate level. A further study of combinational and sequential logic focuses on issues and design methods which are relevant to modern styles of implementation, and provides a framework for later studies in VLSI design.

Views of a design: Behaviour, structure, layout.

Survey of modern technologies: VLSI, ASIC, programmable logic.

Top-down design: Classification, decomposition.

Minimisation: Definitions, minimisation of single output functions using prime implicant tables, multiple output prime implicants, variable entered Karnough maps.

MSI combinational logic blocks: Decoders, multiplexers, parity generators.

Circuit hazards: Static and dynamic hazards, logic hazards and their removal, function hazards.

Finite state machines: Moore and Mealy models, state transition graphs, ASM charts, state tables, state reduction, bubble charts, memory based state machines

Synchronous sequential circuits: state encoding, asynchronous inputs, metastability, counters and registers.

Arithmetic circuits: ripple carry adder/subtractor, carry-lookahead, carry-bypass and carry-select adders, serial and parallel multipliers, carry-save multiplication, Wallace tree, Booth algorithm.

Memory: Flash, SRAM, DRAM : read and write waveforms, SRAM/DRAM architecture, timing parameters

Programmable logic devices: FPGA architecture : look-up tables, logic cells, embedded logic blocks, CAD tools, application of FPGAs and their limitations.

Laboratory Work case study: Design using VHDL of a serial data receiver.

Intended Learning Outcomes

On successful completion of the unit a student will be able to:

  1. Explain the principles of logic minimisation in combinational logic circuits and how to apply them in simple examples
  2. List the range of technology available for the implementation of digital systems and be familiar with the procedure which leads to an implementation using programmable logic
  3. Apply hardware description languages (VHDL) to design fairly complex combinatorial and sequential circuits
  4. Explain the origin of hazards in combinational logic circuits, under what conditions they are problematic, and how to identify and remove them
  5. Analyse and design synchronous sequential circuits using algorithmic state machine (ASM) and bubble chart design methodologies
  6. Analyse the timing of synchronous circuits in waveforms, the effects of metastability and how to avoid it
  7. Design efficient arithmetic circuits at the architectural level with different area/performance trade-offs
  8. Explain how memory circuits work and the advantages/disadvantages of different technologies

Teaching Information

Teaching will be delivered through a combination of synchronous and asynchronous sessions, including lectures, practical activities supported by drop-in sessions, problem sheets and self-directed exercises.

Assessment Information

Formative: Online Test 1

Summative: Exam (January, 100%)


If this unit has a Resource List, you will normally find a link to it in the Blackboard area for the unit. Sometimes there will be a separate link for each weekly topic.

If you are unable to access a list through Blackboard, you can also find it via the Resource Lists homepage. Search for the list by the unit name or code (e.g. EENG20400).

How much time the unit requires
Each credit equates to 10 hours of total student input. For example a 20 credit unit will take you 200 hours of study to complete. Your total learning time is made up of contact time, directed learning tasks, independent learning and assessment activity.

See the Faculty workload statement relating to this unit for more information.

The Board of Examiners will consider all cases where students have failed or not completed the assessments required for credit. The Board considers each student's outcomes across all the units which contribute to each year's programme of study. If you have self-certificated your absence from an assessment, you will normally be required to complete it the next time it runs (this is usually in the next assessment period).
The Board of Examiners will take into account any extenuating circumstances and operates within the Regulations and Code of Practice for Taught Programmes.