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Unit information: VLSI Design M in 2022/23

Please note: you are viewing unit and programme information for a past academic year. Please see the current academic year for up to date information.

Unit name VLSI Design M
Unit code EENGM4050
Credit points 10
Level of study M/7
Teaching block(s) Teaching Block 2 (weeks 13 - 24)
Unit director Dr. Arab Hassani
Open unit status Not open
Units you must take before you take this one (pre-requisite units)

EENG20400 or equivalent

Units you must take alongside this one (co-requisite units)

None

Units you may not take alongside this one

None

School/department School of Electrical, Electronic and Mechanical Engineering
Faculty Faculty of Engineering

Unit Information

This unit introduces students to the principles of digital chip design.

Starting from a functional model of a MOSFET, analysis and design considerations for transistor level implementations of basic logic gates for different digital logic families are covered. These include static and dynamic logic styles for both combinational and sequential circuits.

Principles of synchronous system design are covered in detail, as are design techniques for dealing with signal integrity issues, and high performance and low power requirements.

The students will make extensive use of industry standard CAD tools for integrated circuit design, simulation and layout and gain experience in the design process from schematic entry to final tape-out of the chip.

Your learning on this unit

Having completed this unit, students will be able to:

  1. Analyse digital logic circuits for functionality, performance, energy and power consumption
  2. Design MOSFET circuits to implement a given digital logic function in complementary and pass-transistor design styles
  3. Design and optimise digital MOSFET circuits to meet functional and performance constraints
  4. Construct the physical layout of small-scale circuits
  5. Describe synchronous design principles and apply them in system analysis
  6. Describe techniques for dealing with interconnect

How you will learn

Teaching will be delivered through a combination of synchronous and asynchronous sessions, including lectures, practical activities supported by drop-in sessions, problem sheets and self-directed exercises.

How you will be assessed

Summative for EENG M4050:

Coursework Assignment 1 (30%)

Coursework Assignment 2 (30%)

Exam (40%)

Resources

If this unit has a Resource List, you will normally find a link to it in the Blackboard area for the unit. Sometimes there will be a separate link for each weekly topic.

If you are unable to access a list through Blackboard, you can also find it via the Resource Lists homepage. Search for the list by the unit name or code (e.g. EENGM4050).

How much time the unit requires
Each credit equates to 10 hours of total student input. For example a 20 credit unit will take you 200 hours of study to complete. Your total learning time is made up of contact time, directed learning tasks, independent learning and assessment activity.

See the Faculty workload statement relating to this unit for more information.

Assessment
The Board of Examiners will consider all cases where students have failed or not completed the assessments required for credit. The Board considers each student's outcomes across all the units which contribute to each year's programme of study. If you have self-certificated your absence from an assessment, you will normally be required to complete it the next time it runs (this is usually in the next assessment period).
The Board of Examiners will take into account any extenuating circumstances and operates within the Regulations and Code of Practice for Taught Programmes.

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